With the development of integrated circuits and resulting miniaturization of complex electronic systems, it has been found practical to assemble integrated micro-circuits (commonly referred to as "chips") on multi-chip carrier arrays. Such a carrier array typically consists of a thin sheet of ceramic or other non-conductive material on one surface of which individual rectangular carrier units are defined by means of two perpendicular sets of parallel scribe lines. The array is later divided along these scribe lines into individual carriers. In order to permit electrical feed through from one side of a carrier to the other, perforations are laser-machine along the scribe lines so that each carrier is surrounded about its perimeter by a number of perforations greater than or equal to the number of conductors which must be attached to the chip to be mounted on the carrier. The laser machining process generally results in oblong perforations having parallel sides along their length and somewhat rounded ends. Adjacent carriers share the the series of perforations machined along the shared scribe line segment. The perforations are line with conductive material and connect solder pads on one side of the carrier to trace conductors on the other, which in turn connect to various terminals on the chip.
The current generation of multi-chip carrier arrays suffers from two serious drawbacks. Both drawbacks stem from the fact that the oblong perforations, which are located about the periphery of each carrier and permit electrical conduction from one surface of a carrier to the opposite surface, have their major axes coincidental with the scribe lines. Given this orientation of the perforations, it is difficult to leave an insulating gap between the solder pads located on adjoining carriers on opposite sides of a perforation. Hence, it is also impossible to test an IC chip-carrier combination prior to division of the array into discrete carriers, since the majority of perforations would connect two lines from two unrelated chips. The lack of a gap between solder pads also contributes to a tendency of the solder pads and the printed trace conductors to peel away from the surface of the carrier once the array is divided.